Metal Oxide Semiconductor Field Effect Transistors (MOSFETs) and Junction Field Effect Transistors (JFETs) are often used as the building blocks of low-noise amplifier devices fabricated on integrated circuit chips. Such amplifiers are useful for instance in audio applications, capacitive sensor applications, and thermal sensor detection applications where it is important to minimise the adverse effects of noise arising from, amongst other things, the DC-voltage bias source, and the electronic elements which comprise the biasing circuitry.
Amplifiers which are built from MOSFETs and JFETs tend to have very large input impedances and as such, it is important that the biasing circuitry also has a biasing impedance which is not much smaller than the input impedance of the amplifier to ensure efficient operation of the amplifier. The relatively high impedance of the biasing circuitry may also be utilised in combination with a capacitor to form a low-pass filter which may be used to filter out noise arising from the biasing circuitry. FIG. 3 shows an example of a prior art biasing network which is arranged in parallel with a capacitor (C) so that it simultaneously provides low-pass filtering at the input of an amplifier. FIG. 4 graphically represents the relationship between the noise output (kT/C) of the biasing network in parallel with the capacitor (C) as a function of impedance.
Ideally, the bandwidth of noise arising from the biasing network shown in FIG. 3, is controlled by either adjusting the value of the capacitor (C) or the impedance. In practice, because the magnitude of the capacitor (C) is limited by the transducer design, the bandwidth of the noise is limited by increasing the magnitude of the impedance (typically in the tens of Giga-Ohms). However, where the biasing network is to be implemented on an integrated circuit, it is extremely difficult to provide a high impedance value in an area-efficient manner.